j. s e.11zu j loancti, line. 20 stern ave. springfield, new jersey 07081 u.s.a. IRFF120 telephone: (973) 376-2922 (212) 227-6005 fax: (973) 376-8960 6.0a, 100v, 0.300 ohm, n-channel power mosfet this n-channel enhancement mode silicon gate power field effect transistor is an advanced power mosfet designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. all of these power mosfets are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. these types can be operated directly from integrated circuits. ordering information part number IRFF120 package to-205af brand IRFF120 note: when ordering, use the entire part number. features ? 6.0a, 100v ? rds(0n) = 0.300q ? single pulse avalanche energy rated ? soa is power dissipation limited ? nanosecond switching speeds ? linear transfer characteristics ? high input impedance ? related literature - tb334, "guidelines for soldering surface mount components to pc boards" symbol g a 6 s packaging jedec to-205af drain - (case) source gate nj semi-conductors reserves the right to change test conditions, parameter limits and package dimensions without notice. information furnished by nj semi-conductors is believed to be both accurate and reliable at the time of going to press. however, nj semi-conductors assumes no responsibility for any errors or omissions discovered in its use. nj semi-conductors encourages customers to verity that datasheets are current before placing orders. quality semi-conductors
IRFF120 absolute maximum ratings tc = 25c, unless otherwise specified 1rff120 units drain to source voltage (note 1) vds 100 v drain to gate voltage (rgs = 20kfi) (note 1) vdgr 100 v continuous drain current id 6.0 a pulsed drain current (note 3) idm 24 a gate to source voltage vgs 20 v maximum power dissipation pd 20 w linear derating factor 0.16 w/c single pulse avalanche energy rating (note 4) eas 36 mj operating and storage temperature tj tqjg ~55 to 150 c maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s tl 300 c package body for 10s, see techbrief 334 tpkg 260 c caution: stresses above those listed in "absolute maximum ratings" may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 1. tj = 25cto125c. electrical specifications tc = 25c, unless otherwise specified parameter drain to source breakdown voltage gate threshold voltage zero gate voltage drain current on-state drain current (note 2) gate to source leakage current drain to source on resistance (note 2) forward transconductance (note 2) turn-on delay time rise time turn-off delay time fall time total gate charge (gate to source + gate to drain) gate to source charge gate to drain ("miller") charge input capacitance output capacitance reverse transfer capacitance internal drain inductance internal source inductance thermal resistance, junction to case thermal resistance, junction to ambient symbol bvdss vgs(th) toss 'd(on) !gss rds(on) 9fs td(on) tr ld(off) tf q9(tot) qgs qgd ciss coss crss ld ls rfljc reja test conditions id = 250ua, vgs = ov (figure 10) vgs = vds. id = 250ua vds = rated bvdss,vgs = ov vds = 0.8 x rated bvdss, vgs = ov, tc = 125c vds " b(on) x rds(on)max , vgs = 10v vgs = 2ov id = 3.0a, vgs = 1ov (figures 8, 9) vds > id(on) x rds(on)max vdd = 0.5 x rated bvdss, i vgs =10v (figures 17, 18), f rl - 6.3q for vdss = 4ov, i times are essentially indepe temperatures id = 3.0a (figure 12) d = 6.0a, rg = 9.m, tl-8dforvdss-50v, wiosfet switching ndent of operating vgs = 10v, id = 6.0a, vds = 0.8 x rated bvdss (figures 14, 19, 20) gate charge is essentially independent of operating temperature vds = 25v, vgs = ov, f = 1 mhz (figure 1 1 ) measured from the drain lead, 5.0mm (0.2in) from header to center of die measured from the source lead, 5.0mm (0.2in) from header to source bonding pad modified mosfet symbol showing the internal devices inductances free air operation min 100 2.0 6.0 - - 1.5 - - - - - - - - - - - - typ - - - - - - 0.25 2.9 20 37 50 35 10 6.0 4.0 450 20 50 5.0 15 - - max - 4.0 25 250 - 100 0.300 - 40 70 100 70 15 - - - - - 6.25 175 units v v ha ua a na n s ns ns ns ns nc nc nc pf pf pf nh nh c/w c/w
IRFF120 source to drain diode specifications parameter continuous source to drain current pulse source to drain current (note 3) source to drain diode voltage (note 2) reverse recovery time reverse recovery charge forward turn-on time symbol isd 'sm vsd trr qrr 'on test conditions modified mosfet symbol showing the integral reverse p-n junction rectifier fa no v i i i )d *) y 1 s tj = 25c, isd = 6.0a, vgs = 0v (figure 13) tj = 150c, isd = 6.0a, dlsd/dt = 100a/us tj = 150c, isd = 6.0a, dlsd/dt = looa/us intrinsic turn-on time is negligible, turn-on speed is substantially controlled by lg + ld min - - - - - typ - - 230 1.0 - max 6.0 24 2.5 - - - units a a v ns uc - notes: 2. pulse test: pulse width < soo^is, duty cycle < 2%. 3. repetitive rating: pulse width limited by max junction temperature. see transient thermal impedance curve (figure 3). 4. vdd = 25v, starting tj = 25c, l = 1.5mh, rg = 25u, peak ias = 6.0a (figures 15, 16). typical performance curves unless otherwise specified cc u ? rt power dissipation multipl o p o e - ^ to "^ b> bo c \^ \ 50 100 150 tc, case temperature (c) figure 1. normalized power dissipation vs case temperature 6.0 ,-. 4.8 < 2.4 1.2 25 50 75 100 125 150 tc, case temperature (c) figure 2. maximum continuous drain current vs case temperature notes: duty factor: d = t-|/t2 peak tj = pdm x zbjc ? rhjc + tc 1f rectangular pulse duration (s) figure 3. normalized maximum transient thermal impedance
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